AMD Zen 5c Crystal Shots Revealed: 16 Cores, 3nm, Single Block Cache

appeared on the web 16-core AMD Zen 5c chiplet crystal shots, which are used in new server processors EPYC 9005These chiplets are manufactured according to 3nm process technology, and the photographs clearly show that the core structure has been completely reworked.

For the first time in a compact architecture, AMD used single core without division into CCX blocks (Core Complex). In previous generations, including Zen 4c, the cores within a single chiplet were divided into two CCX blocks of 8 cores, each with its own L3 cache. This complicated the interaction between the cores: in order for one core to exchange data with another, it was necessary to go through the Infinity Fabric bus.

Now everything has changed: Zen 5c combines all 16 cores into one common structure, in which they directly use 3MB unified L32 cache. This significantly reduces latency when transferring data between cores and improves performance, especially in latency-sensitive tasks.

Chiplet size is 5,7 x 14,83 mm - it is stretched to accommodate more cores and a centralized cache. In one EPYC 9005 processor, there can be up to 12 such chiplets, which gives a maximum 192 core. At the same time, the thermal package of the flagship model reaches 500 W, and the starting one is from 400 W.

Zen 5c repeats all the possibilities of the Zen 5 architecture, but it is made in on a 25% smaller body. This makes it a compact analogue for servers and workstations, while maintaining the level of performance. Unlike Intel, where the "energy-efficient" cores work on a different architecture, AMD uses same instruction set and IPC.